搜索资源列表
FS4LPWPIXGFMOS1
- uart transmitter using verilog.checked in vivado 16.2 version
1_FM_Radio
- 基于vivado与MATLAB联合仿真,实现FM立体声广播，通过simulink的仿真以及Dps平台的帮助，可以直接下板运行(simulation basing on vivadao and matlab)
Sdram
- 在vivado中调用SDRAM的IP核，并通过数据的读入，读出，验证IP核的使用，文件中有仿真结果时序图。(In the vivado call SDRAM IP core, and read through the data, read, verify the use of IP kernel, the file has simulation results sequence diagram.)
Comprehensive_FM_IP
- 在vivado平台上的用verilog语言编写的FM直接调制程序(On vivado platform of FM modulation directly program written in verilog language)
Mealy_TrafficLight
- 基于FPGA交通控制器的Mealy状态机实现(Mealy state machine controller based on FPGA traffic)
random
- 用简单的线性反馈移位寄存器实现了伪随机数的生成…(The pseudo random number is generated by a simple linear feedback shift register)
MEM_Array
- vivado HLS中自定义axi4接口的实现(Implementation of custom axi4 interface in vivado HLS)
CRC
- 4G-LTE标准中turbo编码所用到的CRC编码，绝对可用！(CRC encoding turbo encoding used in 4G-LTE standard)
axi_dma
- 在zedboard开发板上采用vivado通过AXI进行DMA数据传输(Using vivado to transfer DMA data through AXI on zedboard development board)
scripts
- 低通滤波器的实现，通过不同的切割方式实现后，生成的vivado文件资源的使用情况不同，对其进行分析(The implementation of the low pass filter, after the implementation of different cutting methods, the use of the generated vivado file resources is different, to analyze
lab5
- 串口控制器，基于vivado软件下开发，包含代码及管脚分配文件(Serial port controller)
uart_test
- VIVADO uart测试程序基本调试通过 希望有用(VIVADO uart test program)
各种基础module打包下载全集
- 例如分频器，alu，ram的verilog实现(The implementation of divider, alu, ram etc. in verilog)
6988946345940
- FPGA的IIC串口协议 实现IIC 亲测可用(fpga iic it can provide iic in vivado)
EES-A7实验指导书
- VERILOG编程指导书，针对于vivado编程应用(VERILOG programming guide for the application of vivado programming)
ug901-vivado-synthesis-examples
- verilog edge detector codee, for vibado tollssssss
Verilog HDL使用中该注意的问题及一些模块代码
- cpu仿真，提供vivado上的cpu仿真生成文件(cpu simulated,but no one can get 20 words in this short file how can I do? just tell you the simulated file and vivado system is 2015)
project_2_10010
- 检测的序列10010的一个小程序，用vivado做的(A program for detecting sequence '10010' powered by vivado 2014.4)
lab1
- 在vivado上测试通过的fpga流水灯(Test the passing FPGA flow lamp on vivado)
lab3
- 在vivado上测试通过的fpga分频器(FPGA frequency divider tested on vivado)