搜索资源列表
AXI-54
- this all about viviado AXI four light bus communication. it is good for every one who is intersted in studying vivado axi light interfacing-this is all about viviado AXI four light bus communication. it is good for every
Assignment-02-1
- this all about viviado AXI four light bus communication. it is good for every one who is intersted in studying vivado axi light interfacing-this is all about viviado AXI four light bus communication. it is good for every
S02_CH03_EMIO
- 基于ｖｉｖａｄｏ的ＥＭＩＯ流水灯的实现，可以直接运行-Based on vivado EMIO water lamp implementation, you can run directly
S02_CH02_MIO
- 基于ｖｉｖａｄｏ的ＭＩＯ点灯的实现，可以直接运行-Based on vivado MIO lighting implementation, you can run directly
S02_CH05_UBOOT
- 利于ｖｉｖａｄｏ的ｓｄｋ环境实现ｕｂｏｏｔ的编译-Conducive to vivado sdk environment uboot compiler
tiaozhi
- 基于verilog HDL的数字正交解调FPGA实现，仿真结果验证正确，IDE为vivado 2014- U57FA u4E8Everilog HDL u7684 u6570 u5B57 u6B63 u4EA4 u89E3 u8C03 u5B9E u73B0 uFF0C u4EFF u771F u7ED3 u679C u9A8C u8BC1 u6B3 u786E uFF0CIDE u4E3Av
jietiao
- 基于verilog HDL的数字正交（调制）FPGA实现，仿真结果验证正确。vivado 2014- U57FA u4E8Everilog HDL u7684 u6570 u5B57 u6B63 u4EA4 uFF08 u8C03 u5236 uFF09FPGA u5B9E u73B0 uFF0C u4EFF u771F u7ED3 u679C u9A8C u8BC1 u6B63 u786E
Freq_gen
- VHDL语音写的标准分频模块，在vivado开发环境下运行-VHDL voice write standard frequency module, run in vivado development environment
rs232
- 基于RS232的串口传输程序，开发环境为vivado-RS232-based serial transmission procedures, the development environment for vivado
Watch
- FPGA开发板的简易时钟源码，开发环境为vivado-FPGA development board of the simple clock source, the development environment for vivado
GPIO_PS_MIO
- VIVADO 2016.4 通过PS和PL实现GPIO接口的实现方式（1），这是完整工程！-VIVADO 2016.4 u901A u8FC7PS u548CPL u5B9E u73B0GPIO u63A5 u53E3 u7684 u5B9E u73B0 u65B9 u5F0F uFF081 uFF09 uFF0C u8FD9 u662F u5B8C u6574 u5DE5 u7A0B uFF
GPIO_PS_EMIO
- VIVADO 2016.4 通过PS和PL实现GPIO接口的实现方式（2），这是完整工程.-VIVADO 2016.4 u901A u8FC7PS u548CPL u5B9E u73B0GPIO u63A5 u53E3 u7684 u5B9E u73B0 u65B9 u5F0F uFF082 uFF09 uFF0C u8FD9 u662F u5B8C u6574 u5DE5 u7A0B.
GPIO_PL_IPCORE
- VIVADO 2016.4 通过PS和PL实现GPIO接口的实现方式（3），这是完整工程！-VIVADO 2016.4 u901A u8FC7PS u548CP u5B4E u73B0GPIO u63A5 u53E3 u7684 u5B9E u73B0 u65B9 u5F0F uFF083 uFF09 uFF0C u8FD9 u662F u5B8C u6574 u5DE5 u7A0B uFF0
I2C_slaver_verison3.0
- I2C从机模块，包含testbench，平台是vivado,仿真测试通过。(I2C slave module, including testbench, the platform is vivado, simulation test passed.)
简易数字钟
- 基于basys3的简易数字钟，可用于vivado开发环境入门，功能有计时和显示模块。(Basys3 based simple digital clock, vivado development environment can be used for entry, function, timing and display module.)
code.sources
- 秒表代码加上相应的key，测试通过可以直接用于vivado(zcscscsasfsdfsfasfasf)
vivado-boards-master
- 弟弟顶顶顶顶顶我的顶顶顶顶顶顶顶顶顶顶顶顶顶顶顶(dadawdafefrgrgsrfsfsefegweg)
mcu_led2
- 基于vivado平台，使用microblaze搭建一个小系统，并能点亮led(Based on the vivado platform, the use of MicroBlaze to build a small system, and can light LED)
MCPU
- 多周期CPU的verilog代码，用vivado可以仿真出波形(multi-cycle CPU by verilog and using vivado to simulate.)
led_test
- 实现流水灯的控制verilog程序，源程序vivado 2015.4(Achieve water light control, Verilog procedures)