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adder
- 基于vhdl硬件描述语言的8位加法器的设计-Based on the design of the 8-bit adder VHDL hardware descr iption language
adder
- adder unit designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
Four-bit-full-adder
- 四位全加器，是自己编写的，如有错误，请原谅-I have written four full adder, is subject to error, please forgive
32bit-adder
- 用hspice软件写完成的32位加法器,可以完成2个32bit数组的加法运算-32bits adder for hspice
adder
- tis an adder code in vhdl-tis is an adder code in vhdl
8-grade-4-pipeline-adder-Verilog
- 这是一个8位4级流水线的加法器的Verilog程序。-This is a eight grade 4 pipeline adder the Verilog program.
21-bit--leading-adder-Verilog
- 这是一个21位超前进位加法器的verilog程序。-21 bit leading adder verilog program.
16-leading-adder-Verilog-program
- 这是一个16位超前进位加法器的Verilog程序。-This is a 16 bit leading adder verilog program.
adder
- adder in vhdl, adder can be add some of inputs and have output in output variabels
adder
- VHDL语言编写，在实验箱上实现加法器的仿真，可行-VHDL language adder simulation experiment box, feasible
four-adder-design
- 可编程逻辑设计-用VHDL语言进行四位加法器的设计-Programmable logic design _ four adder design
Flying-Adder
- Flying-Adder是一种新型全数字结构频率合成器，压缩包包含txt文本和说明作用的图片，文本是VHDL代码，代码分为不同模块，再用元件例化。-VHDL Code and Some Images for Flying-Adder Frequency Synthesizer. It s a All-digital Novel Structure.
adder
- 加法器程序，c++ builder程序，源程序-adder，can add you want number
ADDER
- vhdl最基本的入门的一个代码，一位全加器-one-bit adder
assg-5-(serial-bit-adder)
- 4 bit adder using four full adder’s structural modeling style
1.Area-Efficient-Carry-Select-Adder
- Area efficient carry save adder
Adder
- 8bit low power pipelined adder-8bit low power pipelined adder
adder
- 实现一个4位二进制数加法器，实验时用高低电平开关作为输入，用发光二极管管作为输出。-A 4-bit binary adder, experiments with high and low level switch as an input, as output light emitting diode tube.
4bit-parallel-adder
- The program contains verilog code for 4bit parallel adder
adder
- a adder in c++ language