搜索资源列表
tripledes
- 3-DES加密IP核VHDL源码，3次DES流水执行-VHDL source code for 3-DES encryption IP core, pipelined execution
i2c_ip
- I2C的ip核，Verilog实现，可以直接用在你的项目中。I2C是一种简单实用的通讯协议。-I2C' s ip nuclear, Verilog realization, you can directly use in your projects. I2C is a simple and practical protocol.
SRAM_Controller
- Altera University Program的Avalon总线IP核，SRAM控制代码，可以解压后直接挂载在Avalon总线上 -Altera University Program of the Avalon bus IP core, SRAM control code can be directly mounted after decompression in the Avalon bus
ipcore
- XILINX公司ISE自带的IP核，功能介绍，如何使用这些IP核来加快你的开发。-IP release note guide
C8051IP
- FPGA应用，51单片机的IP核，在FPGA中嵌入单片机的源代码-FPGA applications, 51 MCU IP core, single-chip embedded in the FPGA source code
10100MIP
- 以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码，可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
sdramcontroller
- 最完整的SDRAM控制IP核，包括源代码，仿真文件，以及IP核描述文件，包你用得上-SDRAM control of the most complete IP core, including source code, simulation, as well as IP core descr iption files, it can be helpful
mc8051_MYdemo
- 51IP核一些资料， 很好可以根据自己的需要进行定制，方便自己设计。-51IP Nuclear some information, well you can customize according to their own needs to facilitate own design.
FFT_verilog
- verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
altera_up_avalon_sd_card_interface
- 基于VHDL的SD卡IP核，Altera公司推出的大学计划！最新版本9.0-VHDL-based IP core of the SD card, Altera' s university program launched! The latest version 9.0
mc8051
- Oregano Systems 8051 ip核-Oregano Systems 8051 ip core
ethernet
- 以太网MAC层IP核设计Veriolg代码，包括TESTBECH平台和设计文档-Ethernet MAC layer IP core design Veriolg code, including TESTBECH platform and design documents
UARTipcore
- 这是一个关于UART的IP核，用VHDL写的。经过本人的鉴证，非常实用并且写的非常好。-This is one of the IP core on the UART, using VHDL written. After my verification, very practical and very well written.
components
- quartus的几个IP核（PWM,RAM,I2C）-quartus several IP core (PWM, RAM, I2C)
qam_64
- 64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核-64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS
de2_sd
- 大学计划里面的sd卡ip核，非常有用。在de2板子上可以非常方便使用-University plans to sd card inside ip core, very useful. In the de2 board can be very easy to use
IPcore
- 非常有用的IP核资源，里面包含了JTAG,MEMORY,PCI，SDRAM和USB1.1等内容，期望对大家有用-A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, and USB1.1 and other content, expectations for all of us
DW8051
- 8051Ip核内部ram。很多8051iP核都没有内部ram，上传一个希望对大家有用-internel ram of 8051Ip
uart16550_latest[1].tar
- 开源UART IP核16550，该IP核兼容16550 UART，具有Modem功能，完全可编程的串行接口具有可设置的字符长度、奇偶校验、停止位以及波特率生成器。-Open-source UART IP core 16550, the IP core is compatible with 16550 UART, with Modem function, fully programmable serial interface can be
C8051_mega_core.tar
- 8051单片机软核，测试代码和仿真环境，可直接上fpga使用，是一个成熟的ip核。经本人仿真以及在fpga上测试，完全正常。-8051 soft ip core, testbench, simulation environment