搜索资源列表
8051IP 核源代码（VHDL）
- 8051IP 核源代码-8051IP nuclear source code
usb1.1_Verilog
- usb1.1的设备控制器IP核，是用verilog硬件描述语言写的-USB1.1 IP core for device control, written with hardware describing language of Verilog.
tiny16cpu_maxII
- 这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核，文档齐全-this is the ALtera devoted second-generation PLD MAXII on the 16-bit microprocessor IP core, complete documentation
ethernet.tar
- 以太网10/100M IP核Verilog源码，可综合。-IP Ethernet 10/100 nuclear Verilog source can be integrated.
I2C_IPcore_VHDL
- 这是一个I2C串行数据通信协议以VHDL硬件描述语言实现的IP核，可直接编译运行-I2C serial data communication protocol to VHDL hardware descr iption language of the IP core can be directly translated Operation
wbspec_b3
- soc中ip核集成时所采用的一种片上总线，开发的，为opencores所采用，wishbone片上总线指南-were integrated ip nuclear adopted by an on-chip bus, development, for opencores using the on-chip bus wishbone Guide
mc8051
- fpga 8051单片机IP核。This is version 1.3 of the MC8051 IP core-8051 IP core. This is version 1.3 of the IP core MC8051
ref-ualaw
- A率/u率 压缩与解压缩的IP核，。 # 由AHDL语言写成，可在MaxplusII和QuartusII中使用，源代码加密。-A rate/u rate compression and decompression of the IP core,. By AHDL# languages, and the Quartus II MaxplusII use, the source code encryption.
200512251221612004
- 本文件是altera公司fpga的ip核，从国外网站下载的免费源码。-ALTERA This document is the company they simply ip nuclear, downloaded from the web free source.
2005122512232492458
- 本文件是关于vhdl语言的网上最近的免费ip核文件。-VHDL language on the Internet free ip recent nuclear documents.
AUDIO_DAC
- 一个关于声音处理的Verilog语言编写的解码芯片，可以用于FPGA处理芯片的IP核，欢迎大家来用。-a voice on the Verilog language decoder chip, FPGA can be used to handle IP core chips, all are welcome to use.
ata_ip
- ATA接口的IP核,经过量产的验证,已经在quartus5.1下编译通过了.-ATA interface IP core, after volume production test in quartus5.1 compiler passed.
wb_dma.tar
- DMA的控制器的IP核,和ATA控制器配合,可以实现DMA方式高速传输数据.-DMA controller IP core, and ATA controller tie, DMA can achieve high-speed transmission of data.
user_logic_VGA_Controller
- user_logic_VGA_Controller，适合于DE2开发板，把这个文件夹放在工程目录之中，就可以在SOPC里直接添加VGA_Controller IP核了，很方便使用。-user_logic_VGA_Controller. suitable for Dictyophora development board, this folder on the project directory, it can be added dire
DE2_Top
- DE2_Top.rar，做好了的IP核，大家开来下啊！-DE2_Top.rar, do a good job of the IP core, open to everyone under ah!
DE2_NET
- DE2_Top.rar，做好了的IP核，大家开来下啊！-DE2_Top.rar, do a good job of the IP core, open to everyone under ah!
LPM_ff
- VHDL中IP核之参数化触发器中文使用介绍-VHDL IP parameters of the nuclear trigger on the use of Chinese
USB2.0IP_core_Verilog
- 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-complete with verilog language development USB2.0 IP source code, including documentation, Simulation documents
DesignofTrainCommunicationAdapterBasedonSOPC
- 介绍了MVB总线帧结构，并完成了用于网络连接的MVB总线访问IP核的设计。-introduced the MVB bus fr a me structure, and completed the network connection for the MVB bus visit IP core design.
FFT_IP
- Xilinx FPGA 的IP核，实现FFT功能的-Xilinx FPGA IP core, FFT function