搜索资源列表
PLLprogram
- 数字锁相环程序，适合于FM、AM开发 数字锁相环程序，适合于FM、AM开发-DPLL procedures for FM, AM Development DPLL procedures for FM, AM Development
PLLpro
- 关于数字锁相环的使用，结合FM,AM的使用来说明-DPLL on the use of combined FM and AM to illustrate the use of
lmf3
- 这是有关锁相环的一些必用知识.希望能对大家有所帮助哈-This is some of the PLL will use that knowledge. We want to help Kazakhstan
010919.pdf
- 全数字锁相环ＶＨＤＬ描述并实现功能仿真，另附有图形说明-DPLL VHDL descr iption and achieve functional simulation, followed by graphic shows
Div20PLL
- 使用VHDL实现锁相环,是个学习VHDL的好例子,与众分享-PLL using VHDL, VHDL is learning a good example, sharing with the public
c6_PLLsim
- 这个程序是matlab用来来对锁相环（PLL）进行仿真的，这样的选择基于多方面的考虑-This procedure is used Matlab to the phase-locked loop (PLL) simulation, This choice is based on a number of considerations
lmx2325-test
- PLL-LMX2325 C程序,用于锁相环频率控制-PLL-LMX2325 C procedures for the PLL frequency control
pll_improvement
- 一种改进的全数字锁相环设计 一种改进的全数字锁相环设计-an improved DPLL design an improved design DPLL
VHDLDPLL
- 比较好的技术文章《基于VHDL的全数字锁相环的设计》有关键部分的源代码。-relatively good technical article, "based on VHDL DPLL the design" a key part of the source code.
zicaiyang
- 技术文章《自采样比例积分控制全数字锁相环的性能分析和实现》有一定参考价值-technical article, "Since sampling proportional integral control DPLL performance analysis and achieve" a certain reference value
pll_LMX1601
- 一个汇编写的锁相环程序，直接用来控制国半的LMX1601芯片，也可参考控制其它PLL IC-a compilation of written procedures PLL directly used to control half the country LMX1601 chips, Reference may also control other PLL IC
verilogpll1234
- 基于verilog的全数字锁相环的设计，基于verilog的全数字锁相环的设计。-verilog DPLL the design, verilog based on the DPLL design.
dtf-test
- 89C54构成MC4511锁相环稳定性扫描测试仪器，-89C54 constitute MC4511 PLL stability scan testing equipment
PLL_System_Sim_for_matlab
- 仿真锁相环系统，可以仿真锁定时间。不同的环路带宽对系统的非理想特性！-PLL simulation system that can lock simulation time. Different loop bandwidth of the system of non-ideal characteristics!
pll
- 关于锁相环的MATLAB的仿真程序，其中有详细的注释，希望它能能对你的能有所帮助-PLL on the MATLAB simulation program, including a detailed Notes hope it can be your right, can be helped
costas8
- 用软件锁相环解调QPSK的simulink仿真,希望有帮助-software PLL QPSK demodulator the simulink, with the hope of helping
VHDL_PLL
- 介绍了锁相环PLL的实现原理，可以为VHDL实现PLL提供参考。-introduced PLL PLL The principle for VHDL PLL reference.
dpll0226
- 用一片CPLD实现数字锁相环,用VHDL或V语言.-with a DPLL CPLD, VHDL or V language.
DPLL0227+V+qt6
- 用一片CPLD实现数字锁相环,用VHDL或V语言.-with a DPLL CPLD, VHDL or V language.
pll1218
- 用一片CPLD实现数字锁相环,用VHDL或V语言.-with a DPLL CPLD, VHDL or V language.